Engineer I - Design

Microchip Technology Inc. Other US Location

Company

Microchip Technology Inc.

Location

Other US Location

Type

Full Time

Job Description

At Microchip, we work every day to innovate and develop products that solve our customers' technology challenges. Our team of more than 20,000 people worldwide is dedicated to delivering on the promise of working together to improve lives.

Learn about our guiding values that are the building blocks and foundation of our culture and discover how we make a positive impact in the communities in which we operate. We believe our culture fosters trust, collaboration and belonging.

Our people serve the industrial, computing, automotive, communications, aerospace and defense, and consumer market segments. As part of our global team, you can build technology solutions in our six growth areas - 5G, data centers, autonomous driving, the Internet of Things, electric vehicles, and artificial intelligence and machine learning.

Around the world, we are committed every day to recruiting, retaining and promoting people in our diverse workforce. Your perspective, passion and ingenuity will contribute to achieving more as we fulfill our mission as a leading provider of smart, connected and secure embedded control solutions.

Join our community of exceptional people doing incredible things.

Job Description:

Microchip is searching for an Engineer I - Design to be part of the USB and Networking Business Unit located in Hauppauge, NY. A candidate placed in this position will be a contributor in the USB and Networking Design Team, focused on bringing advanced connectivity devices to market, including Ethernet switches & bridges, USB hubs & power delivery, PCIe bridges, serial interfaces (SerDes) and other connectivity interfaces.

The successful candidate will be responsible for, but not limited to, the following:

  • Participating in design, FPGA, DFT, Synthesis and other design activities like micro-architecture and documentation
  • Integrating IP modules, designing RTL blocks, glue logic, interfacing with verification and emulation teams
  • Performing development activities such as Formal Verification, Clock Domain Crossing (CDC) analysis, Static Timing Analysis, and low power design
  • Designing custom digital IPs
  • Emulation and debug (ASIC and FPGA) of the IP and solution
  • Develop block level test plan documentation based on datasheets and requirements.
  • Learning and dynamically applying knowledge of the SoC, protocols and standards


Requirements/Qualifications:

  • Bachelor's degree in Electrical or equivalent Engineering with 0-2 years of relevant industry experience
  • Experience in Ethernet, USB, and/or PCIe desirable
  • Digital design projects using Verilog/System Verilog
  • Proficient in Verilog/System Verilog
  • Strong analytical, communication (written and verbal), and documentation skills
  • Excellent problem solving, debugging and organization skills
  • Must be highly motivated and able to work in a collaborative group environment.


Preferred Qualifications:
  • Experience with the ASIC design and/or verification flow
  • Understanding of following protocols: USB (USB3.0, USB2.0), USB Power Delivery, PCIe, Ethernet (10/100/1G BASE-T and 1G-25G SerDes)
  • Peripherals Interfaces: SPI, I2C, UART etc.
  • Experience with simulation and simulation tools
  • Experience with Xilinx FPGA emulation and debug


Travel Time:

0% - 25%

Physical Attributes:

Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

Physical Requirements Text (USA Only) 80% Sitting, 10% Standing, 10% Walking, 100% Inside

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the EEO is the Law Poster and the EEO is the Law Poster Supplement . Please also refer to the Pay Transparency Policy Statement .

Date Posted

11/17/2022

Views

10

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