Principal Engineer, Digital IC Design

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central System Engineering (CSE) in Central Engineering, independent of other CE functions including DSP algorithm development, circuit design, physical design, packaging, etc., is a function team responsible of validating all Marvell HSS IPs in the lab environment and supporting all Marvell business units for fast and smooth SoC production.
Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.

What You Can Expect

ASIC design engineer responsible for the design, verification and evaluation of digital circuits in high-speed data communication ICs. The candidate will be involved in verification plan development, test environment setup, modeling, testcase development and execution. He/She will be responsible for block and/or chip level verification.

The responsibilities include but not limited to.

• Improve the design methodology and flow.
• Design verification for various type of SerDes IPs ranging from 10Gbps to 224Gbps data-rates for different applications.
• Collaborate with Analog/DSP/Digital Design/FW/AE teams to deliver the competitive SerDes IP solutions for all the Marvell product lines.
• Provide the support to the product teams, for both pre and post silicon
• Test chip integration

What We're Looking For

• Master’s degree and/or PhD in Electrical Engineering, Computer Science or related fields and 9+ years of experience.
• Strong communication skills and a team player.
• Hardworking and motivated to be part of a highly competent design team.
• Proficient with fundamental concepts in digital logic design.
• Solid understanding of ASIC verification flows and methodologies.
• Experience with Verilog and SystemVerilog/SystemC/Vera.
• Strong skills in Perl and Tcl scripting.
• Proficient in UNIX Shell scripting (Csh, Bash).

Preferred skills:

• Formal verification.
• Low power design.
• MATLAB and C/C++ based system simulation and evaluation.
• DSP function hardware implementation knowledge.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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