Sr. Silicon Design Engineer

Advanced Micro Devices South Bay

Company

Advanced Micro Devices

Location

South Bay

Type

Full Time

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

AMD Xilinx is seeking a Synthesis and Timing engineer to participate in the development of large SOC's with multiple physical blocks and 300+ clock domains.

THE PERSON:

High energy candidate with strong written and verbal communication skills, technically strong to find solutions and help the team both inside and outside the organization.

KEY RESPONSIBILITIES:

  • Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff
  • Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency.
  • Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks
  • Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows
  • Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts)

PREFERRED EXPERIENCE:

  • Worked with EDA tools that enable RTL quality checks
  • Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows.
  • Experience with analyzing the timing reports and identifying both the design and constraints related issues.
  • Ability to multitask and grasp new flows/tools/ideas
  • Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc.

ACADEMIC CREDENTIALS:

  • Bachelor's degree or Master's degree with experience

LOCATION: San Jose, CA, United States

#LI-NM1

#LI-HYBRID

At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Date Posted

05/05/2024

Views

5

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