Validation Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Work scope:

- PCIe/USB Protocol validation in FPGA platform. Responsible for the implementation of PCIE /USB controller in FPGA, including controller RTL migration, simulation, debug, etc;

- Serdes IP characterization in FPGA platform. Create the RTL, simulate, debug to support testing function.

- Co-work with test engineer to complete PCIe,USB compliance testing;

- Lab testing automatic support, etc.

Work scope:

- PCIe/USB Protocol validation in FPGA platform. Responsible for the implementation of PCIE /USB controller in FPGA, including controller RTL migration, simulation, debug, etc;

- Serdes IP characterization in FPGA platform. Create the RTL, simulate, debug to support testing function.

- Co-work with test engineer to complete PCIe,USB compliance testing;

- Lab testing automatic support, etc.

Required Qualifications:

1. EE related background in FPGA design, 3~4 years work experience or above;

2. Experienced in Xilinx FPGA design flow, familiar with Vivado, ISE design tools;

3. Experienced in Verilog/VHDL language;

4. Preferred qualifications with PCIe,USB,SATA,DP controller design experience;

5. Knowledge of PIPE interface architecture is preferred;

6. Good communication skill and willingness to work with a global team.

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